ACOE361: Digital Systems Design - Labs - S. Savvas
(ACOE361_Labs)

 This course requires an enrolment key

By the end of the course, the students should be able to:

  1. Use EDA tools for ASIC/VLSI design.
  2. Describe ASIC, PLD and FPGA technologies.
  3. Design hazard free synchronous Digital Systems using ASMs and reliably synchronise asynchronous inputs.
  4. Use HDLs and develop RTL design mentality.
  5. Implement, test and verify the basic units of a CPU and memory using VHDL and FPGA boards.

This course requires an enrolment key